The ability to mark erasure precisely is useful for data communications. The concept of error locating vector of Vector Symbol Decoding (VSD) has been used to mark error positions. This paper proposes the idea of converting none or some errors to erasures to reduce the decoding complexity. If the number of erroneous symbols input to VSD is limited to x, the number of matrix inversion of sized x will increase. However, all matrix inversions of larger size are eliminated. The q-ary Symmetric Channel is selected for packet-based transmission. Densities of parity check patterns are investigated, and results show that lower density of 1’s provides better performance. In terms of code word length, shorter code word is preferred as it requires less overhead.