New Scheme of Reducing Shift and Capture Power Using the X-Filling Methodology
- Resource Type
- Conference
- Authors
- Chen, Tsung-Tang; Li, Wei-Lin; Wu, Po-Han; Rau, Jiann-Chyi
- Source
- 2009 Asian Test Symposium Asian Test Symposium, 2009. ATS '09.. :105-110 Nov, 2009
- Subject
- Components, Circuits, Devices and Systems
Circuit testing
Power dissipation
Circuit faults
Clocks
Runtime
Delay
Design for testability
Automatic test pattern generation
Performance evaluation
Controllability
At-Speed Scan Testing
X-Filling
DFT
- Language
- ISSN
- 1081-7735
2377-5386
A scheme that ATPG-based technique for reducing shift and capture power during scan testing is presented without any influence on fault coverage. This paper presents an X-filling approach called Adjacent Backtracing fill (AB-fill). After AB-fill approach for at-speed scan testing, all of test patterns have assigned as partially-specified values with a small number of don’t care bits (x) as in test compression, and it is integrated in the ATPG algorithm to reduce capture power while feeding the first test pattern into CUT.