A polymorphic gate can change its functionality based on external conditions such as temperature, voltage, and external signals. Although this concept was proposed more than two decades ago and has found success in designing circuits for area minimization and security applications, how to construct polymorphic gates remains a challenge because they do not have the structure of conventional CMOS gates. Without knowing the causes of polymorphism, the majority of reported polymorphic gates are generated in the ad-hoc fashion, using evolutionary algorithms and the time-consuming Spice simulation. In this paper, we study thousands of candidate circuits that we have created for the sources of polymorphism. We observe several features that are not present in traditional CMOS gates. Circuit analysis suggests that these features are potential sources of polymorphism, which is confirmed as they exist in the polymorphic gates reported in the literature. Furthermore, we demonstrate with examples that polymorphic gates can be effectively constructed using these features as guidance.