Toeplitz Hashing is a class of functions in the 2-universal hash function family, that is widely adopted in quantum secure applications, particularly for the privacy amplification in quantum key distribution to generate secret keys, and as a strong randomness extractor for the quantum random number generators. In this work, we have investigated the preliminary implementation of Toepltiz hashing on processors, co-processors, and system-on-chip (SoC). We have implemented the fast-Fourier transform (FFT)-based Toepltiz hashing on Intel Xeon Cascade-lake 8268 processor and NVIDIA Tesla V100 GPU compute hardware. We have also implemented the binary multiplication-based Toeplitz hashing on the AMD Xilinx ZCU102 FPGA evaluation kit. Further, we present an example of heterogenous computing, by combining an Intel Core i7 CPU with the VEGA ET1031-based Aries v2.0 development board. Finally, we report, for the first time, an implementation of convolution of two matrices on an indigenously designed RISC-V VEGA SoC. Further, we have compared the implementation results following two approaches, i.e. normal matrix multiplication and the number theoretic transform (NTT) method. We report that there is a tenfold reduction in the computational time using the NTT method over the conventional method.