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1 . Conference
Requirements on CD and overlay for 200 GHz QSA SiGe:C HBTs
저자
by
Van Wichelen, K.
;
Witters, L.
;
Van Huylenbroeck, S.
;
Leray, P.
;
Laidler, D.
, et al.
소스
Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Solid-state device research conference Solid-State Device Research Conference, 2004. ESSDERC 2004. Proceeding of the 34th European. :333-336 2004
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7 . Conference
A 0.314/spl mu/m/sup 2/ 6T-SRAM cell build with tall triple-gate devices for 45nm applications using 0.75NA 193nm lithography
저자
by
Nackaerts, A.
;
Ercken, M.
;
Demuynck, S.
;
Lauwers, A.
;
Baerts, C.
, et al.
소스
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. Electron devices meeting Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International. :269-272 2004
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7 . Conference
Full-field EUV and immersion lithography integration in 0.186μm2 FinFET 6T-SRAM cell
저자
by
Veloso, A.
;
Demuynck, S.
;
Ercken, M.
;
Goethals, A. M.
;
Demand, M.
, et al.
소스
2008 IEEE International Electron Devices Meeting Electron Devices Meeting, 2008. IEDM 2008. IEEE International. :1-4 Dec, 2008
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7 . Conference
Integration of tall triple-gate devices with inserted-Ta/sub x/N/sub y/ gate in a 0.274/spl mu/m/sup 2/ 6T-SRAM cell and advanced CMOS logic circuits
저자
by
Witters, L.
;
Collaert, N.
;
Nackaerts, A.
;
Demand, M.
;
Demuynek, S.
, et al.
소스
Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005. VLSI Technology VLSI Technology, 2005. Digest of Technical Papers. 2005 Symposium on. :106-107 2005
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7 . Conference
Embossed polymer waveguide devices
저자
by
Harvey, T.G.
;
Allen, S.
;
Bone, D.J.
;
Bone, E.L.
;
Carter, N.
, et al.
소스
Conference on Lasers and Electro-Optics Europe Lasers and Electro-Optics Europe, 1994 Conference on. :292-292 1994
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7 . Conference
A practical application of multiple parameters profile characterization (MPPC) using CD-SEM on production wafers using Hyper-NA lithography.
저자
by
Ishimoto, T.
;
Sekiguchi, K.
;
Hasegawa, N.
;
Watanabe, K.
;
Laidler, D.
, et al.
소스
Proceedings of SPIE; Nov2009 Part 2, Issue 1, p72722E-72722E-13, 13p
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7 . Conference
Further study on the verification of CD-SEM based monitoring for hyper NA lithography.
저자
by
Ishimoto, T.
;
Osaki, M.
;
Sekiguchi, K.
;
Hasegawa, N.
;
Watanabe, K.
, et al.
소스
Proceedings of SPIE; Nov2008 Part 2, Issue 1, p69222O-69222O-12, 12p
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7 . Conference
Advanced process control for hyper-NA lithography based on CD-SEM measurement.
저자
by
Ishimoto, T.
;
Sekiguchi, K.
;
Hasegawa, N.
;
Maeda, T.
;
Watanabe, K.
, et al.
소스
Proceedings of SPIE; Nov2007 Part 2, Issue 1, p65182P-65182P-11, 11p
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7 . Conference
A 0.314μm2 6T-SRAM cell build with tall triple-gate devices for 45nm applications using 0.75NA 193nm lithography.
저자
by
Nackaerts, A.
;
Ercken, M.
;
Demuynck, S.
;
Lauwers, A.
;
Baerts, C.
, et al.
소스
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004; 2004, p269-272, 4p
Full Text (IEEE)
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7 .
The new-classical contribution to macroeconomics
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by
LAIDLER, D.
.
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