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1 . Academic Journal
Design Technology Co-Optimization for the DRAM Cell Structure With Contact Resistance Variation
저자
by
Lee, J.
;
Asenov, P.
;
Rhyner, R.
;
Kao, E.
;
Amoroso, S.M.
, et al.
소스
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 71(3):1893-1899 Mar, 2024
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7 . Academic Journal
Discrete-Trap Effects on 3-D NAND Variability – Part II: Random Telegraph Noise
저자
by
Malavena, G.
;
Amoroso, S.M.
;
Brown, A.R.
;
Asenov, P.
;
Lin, X.
, et al.
소스
IEEE Journal of the Electron Devices Society IEEE J. Electron Devices Soc. Electron Devices Society, IEEE Journal of the. 12:658-661 2024
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7 . Academic Journal
Discrete-Trap Effects on 3-D NAND Variability – Part I: Threshold Voltage
저자
by
Malavena, G.
;
Amoroso, S.M.
;
Brown, A.R.
;
Asenov, P.
;
Lin, X.
, et al.
소스
IEEE Journal of the Electron Devices Society IEEE J. Electron Devices Soc. Electron Devices Society, IEEE Journal of the. 12:651-657 2024
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7 . Academic Journal
Investigation of Random Telegraph Noise Under Different Programmed Cell Vt Levels in Charge Trap Based 3D NAND Flash
저자
by
Jia, X.
;
Jin, L.
;
Zhou, W.
;
Lu, J.
;
Amoroso, S.M.
, et al.
소스
IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 43(6):878-881 Jun, 2022
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7 . Academic Journal
Comparison of Si < 100 > and < 110 > crystal orientation nanowire transistor reliability using Poisson–Schrödinger and classical simulations
저자
by
Gerrer, L.
;
Georgiev, V.
;
Amoroso, S.M.
;
Towie, E.
;
Asenov, A.
.
소스
In
Microelectronics Reliability
August-September 2015 55(9-10):1307-1312
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7 . Academic Journal
Electron dynamics in nanoscale transistors by means of Wigner and Boltzmann approaches
저자
by
Sellier, J.M.
;
Amoroso, S.M.
;
Nedjalkov, M.
;
Selberherr, S.
;
Asenov, A.
, et al.
소스
In
Physica A: Statistical Mechanics and its Applications
15 March 2014 398:194-198
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7 . Academic Journal
A Worst-Case Analysis of Trap-Assisted Tunneling Leakage in DRAM Using a Machine Learning Approach
저자
by
Lee, J.
;
Asenov, P.
;
Aldegunde, M.
;
Amoroso, S.M.
;
Brown, A.R.
, et al.
소스
IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 42(2):156-159 Feb, 2021
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7 . Conference
Influence of quantum confinement effects over device performance in circular and elliptical silicon nanowire transistors
저자
by
Georgiev, V.P.
;
Ali, T.
;
Wang, Y.
;
Gerrer, L.
;
Amoroso, S.M.
, et al.
소스
2015 International Workshop on Computational Electronics (IWCE) Computational Electronics (IWCE), 2015 International Workshop on. :1-4 Sep, 2015
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7 . Academic Journal
Experimental and Simulation Study of Silicon Nanowire Transistors Using Heavily Doped Channels
저자
by
Georgiev, V.P.
;
Mirza, M.M.
;
Dochioiu, A.
;
Adamu-Lema, F.
;
Amoroso, S.M.
, et al.
소스
IEEE Transactions on Nanotechnology IEEE Trans. Nanotechnology Nanotechnology, IEEE Transactions on. 16(5):727-735 Sep, 2017
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7 . Academic Journal
Simulation Study of the Impact of Quantum Confinement on the Electrostatically Driven Performance of n-type Nanowire Transistors
저자
by
Wang, Y.
;
Al-Ameri, T.
;
Wang, X.
;
Georgiev, V.P.
;
Towie, E.
, et al.
소스
IEEE Transactions on Electron Devices IEEE Trans. Electron Devices Electron Devices, IEEE Transactions on. 62(10):3229-3236 Oct, 2015
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