Designing a SoC to control the next-generation space exploration flight science instruments
- Resource Type
- Conference
- Authors
- Iturbe, Xabier; Keymeulen, Didier; Ozer, Emre; Yiu, Patrick; Berisford, Daniel; Hand, Kevin; Carlson, Robert
- Source
- 2015 28th IEEE International System-on-Chip Conference (SOCC) System-on-Chip Conference (SOCC), 2015 28th IEEE International. :13-18 Sep, 2015
- Subject
- Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Signal Processing and Analysis
Decision support systems
System-on-Chip
Fault-Tolerance
RHBD
Avionics
High-Performance
Signal Processing
- Language
- ISSN
- 2164-1706
SoC technology permits to integrate all the computational power required by next-generation space exploration flight science instruments on a single chip. This paper describes the Xilinx Zynq-based Advanced Processor for space EXploration SoC (APEX-SoC) that has been developed at the Jet Propulsion Laboratory (JPL) in collaboration with ARM. The paper discusses the APEX-SoC architecture and demonstrates its main capabilities when used to control JPL's Compositional InfraRed Imaging Spectrometer (CIRIS). As the CIRIS instrument is intended to explore harsh space environments, the paper also deals with the Radiation Hardened By Design (RHBD) features that have been implemented in the APEX-SoC.