A technology-independent methodology of placement generation for analog circuit
- Resource Type
- Conference
- Authors
- Wai-Chee Wong; Chan, P.C.H.; Wai-On Law
- Source
- Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198) Design automation Design Automation Conference, 1999. Proceedings of the ASP-DAC '99. Asia and South Pacific. :141-144 vol.1 1999
- Subject
- Computing and Processing
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Analog circuits
Circuit simulation
Simulated annealing
Circuit optimization
Routing
Degradation
Partitioning algorithms
Silicon
Costs
Integer linear programming
- Language
An automatic placement system with emphasis on technology independent methodology and device matching consideration for analog layout design is presented. A novel optimization approach based on circuit partitioning, simulated annealing and a branch-and-bound algorithm is proposed to solve the placement problem. The move set used to generate perturbations for annealing is capable of arriving at any topological placement. The branch-and-bound is modified to take circuit performance into consideration. Results of two silicon proven designs generated by the system demonstrate an 8X cycle time reduction as compared to a manual approach.