ASH1: A stack-based input/ output processor for USB operations
- Resource Type
- Conference
- Authors
- Al-Dujaili, Abdullah; Lo Hai Hiung; Shawn Tan
- Source
- 2015 IEEE International Circuits and Systems Symposium (ICSyS) Circuits and Systems Symposium (ICSyS), 2015 IEEE International. :76-79 Sep, 2015
- Subject
- Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Signal Processing and Analysis
Universal Serial Bus
IP networks
Field programmable gate arrays
Cyclones
Ash
Ports (Computers)
Encoding
input/ output processor
usb
stack
wishbone bus
- Language
This paper describes a work in progress: ASH1, an 8-bit input/ output processor (IOP) that is designed to be able to perform USB operations. It has a stack-based architecture where most of the operations are done on the top elements of the stack. The instruction set consists of 17 14-bit instructions optimized for framing and driving software code. ASH1 communicates with the main processing unit (Master CPU) through a wishbone bus. It has been proven reliably at 50 MHz in an Altera Cyclone II FPGA device. With around 1400 FPGA slices and a maximum clock frequency of 90 MHz, ASH1 could make a good substitute for big USB IP Cores. Future work includes making ASH1 MAC Ethernet capable and USB2 compatible.