Technologies and challenges of fine-pitch backside via-last 3DIC TSV process integration and its electrical characteristics and system applications
- Resource Type
- Conference
- Authors
- Chen, Erh-Hao; Tzu-Chien Hsu; Cha-Hsin Lin; Tzeng, Pei-jer; Chung-Chih Wang; Shang-Chun Chen; Chen, Jui-Chin; Chien-Chou Chen; Hsin, Yu-Chen; Po-Chih Chang; Yiu-Hsiang Chang; Shin-Chiang Chen; Yu-Ming Lin; Sue-Chen Liao; Cheng-Ta Ko; Chau-Jie Zhan; Hsiang-Hung Chang; Chun-Hsien Chien; Yung-Fa Chou; Ding-Ming Kwai; Wei-Chung Lo; Tzu-Kun Ku; Ming-Jer Kao
- Source
- Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) VLSI Technology, Systems and Application (VLSI-TSA), Proceedings of Technical Program - 2014 International Symposium on. :1-2 Apr, 2014
- Subject
- Components, Circuits, Devices and Systems
Computing and Processing
Photonics and Electrooptics
Signal Processing and Analysis
Through-silicon vias
Etching
Metals
Foundries
Three-dimensional displays
Laboratories
Silicon
- Language
- ISSN
- 1524-766X
Technologies of fine-pitch backside via last 3DIC through silicon via (TSV) process are developed to be applied to the mass production of 3DIC products. The detailed process development key points and challenges are disclosed. The electrical data are also analyzed to check the TSV process. Also, its application in real 3DIC system is demonstrated to show the benefits of system form factor and frame rate.