Wafer Map Defect Pattern Recognition using Imbalanced Datasets
- Resource Type
- Conference
- Authors
- Tziolas, Theodoros; Theodosiou, Theodosis; Papageorgiou, Konstantinos; Rapti, Aikaterini; Dimitriou, Nikolaos; Tzovaras, Dimitrios; Papageorgiou, Elpiniki
- Source
- 2022 13th International Conference on Information, Intelligence, Systems & Applications (IISA) Information, Intelligence, Systems & Applications (IISA), 2022 13th International Conference on. :1-8 Jul, 2022
- Subject
- Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
General Topics for Engineers
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Semiconductor device modeling
Fabrication
Inspection
Pattern recognition
Convolutional neural networks
Task analysis
Semiconductor industry
classification
convolutional neural network
imbalance processing
WM-811K
- Language
The accurate and automatic inspection of wafer maps is vital for semiconductor engineers to identify defect causes and to optimize the wafer fabrication process. This research work seeks to address the pattern recognition task for the identification of defects in wafer maps, by developing a deep Convolutional Neural Network (CNN) classifier. The proposed CNN-based model utilizes various pre- and post-processing tools and is applied on the public but highly imbalanced industrial dataset WM-811K. To handle imbalance, a methodology of treating each class individually is proposed by applying different processing techniques for down-sampling, splitting and data augmentation based on the number of samples. The proposed model achieves 95.3% accuracy and 93.78% macro F1-score and outperformes other models in the related literature concerning the identification of the majority of classes.