This paper presents an integrated soft start-up circuit implemented in a $0.5-\mu m$ GaN on Si technology suitable for on-chip integration in power applications. The proposed approach avoids the use of large on-chip or external capacitors to overcome the problem of voltage overshoot and inrush current at start up in switching power converters. It could be also adapted to the specific application by choosing the number of Flip Flops, or, for large start-up periods, using a counter, and setting the desired start-up signal duty cycle. Moreover, an optimized Flip Flop circuit topology has been proposed to reduce area occupation. The circuit working principle and the design challenges in GaN technology are discussed together with simulations. The circuit has been designed by considering worst-case conditions. A test buffer has been also included to drive the high external load capacitance of the readout device. Measured waveforms are reported that demonstrate the effective circuit operation and suitability for all-GaN integration.