In the Datacenter, a supercomputer network refers to the interconnections between the clustered processing nodes within a single supercomputer. In this paper, we primarily aim to describe how in supercomputers, as they evolve, the granularity of this inter-node communication continues to scale down, as a direct result of the processing nodes scaling down from full-sized clustered computers (and servers) to interconnected processor cores and even smaller reconfigurable logic cells. Hence, we start by first describing our exploration of the four generations of supercomputing and how they have evolved over the years from macroscale packet-switched coarse-grained cluster computing and grid computing, to conventional supercomputing, and then to fine-grained supercomputer Networks-on-Chip (NoC), and finally, to emerging fine-grained nanoscale NoC FPGA (Field Programmable Gate Arrays) supercomputer-on-chip as we see today. Apart from this, in this work, we also aim to demonstrate and analyze the results of benchmarking the Mandelbrot Set performance on a 3 rd generation supercomputer, which is the Adapteva's 16-core Epiphany supercomputer NoC. On the basis of our study we can come to an inference that the next-generation supercomputing-on-chip will more likely depend on the fine-tuning between multi-core NoCs and high-end FPGA co-processors built into these NoCs.