In this work, we demonstrate indium–gallium–zinc oxide (IGZO) transistors fabricated on an 8-in wafer with high uniformity, steep subthreshold slope, and high reliability under positive bias temperature instability (PBTI) stress. The impact of channel compositions, gate dielectrics, and post-treatment conditions on PBTI degradation is systematically characterized and analyzed. The negative threshold voltage ( ${V}_{\text {TH}}{)}$ shift under positive stress is found to be determined by both hydrogen (H) and oxygen vacancy ( $\text{V}_{\text {O}}{)}$ , which is the dominating factor with the highest time exponent in PBTI of IGZO transistors. By reducing H concentration and suppressing $\text{V}_{\text {O}}$ generation by process engineering in gate-stack, semiconductor channel, and post-treatment condition, IGZO transistors with high PBTI reliability are demonstrated, achieving a low $\vert \Delta {V}_{\text {TH}}\vert $ of 11 mV at 95 °C, ${V}_{\text {stress}}$ of 3 V ( ${t}_{\text {ox}}$ = 7 nm, EOT = 3.2 nm by ${C}$ – ${V}$ measurements, and ${E}_{\text {OX}}$ of 3.7 MV/cm), and ${t}_{\text {stress}}$ of 2 ks.