The single-chip 5Mbaud DFE-based adaptive equalizer for QAM receivers presented in this paper may be used with an A/D converter, demodulator and carrier and timing recovery loop to construct an all-digital general-purpose QAM receiver. The QAM adaptive equalizer chip accommodates 4-, 16-, 64-, and 256-QAM formats, and incorporates a 20-tap feed-forward equalizer (FFE) and a a 2O-tap decision-feedback equalizer (DFE). The FFE can perform either T-spaced or T/2-spaced equalization. The maximum clock rate of the chip is over 100MHz, where the equalizer operates at maximum symbol rate of 5Mbaud, corresponding to throughputs of 10, 20, 30, and 40Mb/s for 4-, 16-, 64-, and 256-QAM, respectively. The chip occupies 9.8x6.7mm/sup 2/ die area in a 1.O /spl mu/m CMOS process.ETX