SOPC-Based Parallel Genetic Algorithm
- Resource Type
- Conference
- Authors
- Jelodar, M.S.; Kamal, M.; Fakhraie, S.M.; Ahmadabadi, M.N.
- Source
- 2006 IEEE International Conference on Evolutionary Computation Evolutionary Computation, 2006. CEC 2006. IEEE Congress on. :2800-2806 2006
- Subject
- Computing and Processing
Genetic algorithms
Hardware
Field programmable gate arrays
Electronics packaging
Workstations
Evolutionary computation
Steady-state
Personal communication networks
Performance gain
Application software
- Language
- ISSN
- 1089-778X
1941-0026
The ever-growing complexity of the modern chips is forcing fundamental changes in the way systems are designed. System-on-a-Programmable-Chip (SOPC) concept is bringing a major revolution in the design of integrated circuits, due to the fact that it makes unprecedented levels of in-field integration possible. Genetic Algorithm (GA) is a powerful function optimizer that is used successfully to solve problems in many different disciplines. A major drawback of GA is that it needs huge computation time for sequential execution on PCs. Therefore, the hardware implementation of GA has been the focus of some recent studies. Parallel GA (PGA) is particularly important for efficient hardware implementation and promise substantial gains in performance and results. In this paper, a SOPC-based PGA framework is proposed. Our proposed framework can be used in real-time applications. We have implemented our proposed system on an Altera ® Stratix Development Kit and we compare its performance with the corresponding software simulation. The results obtained indicate a speedup of up to 50 times in the elapsed computation time.