A 45nm BiCMOS process, based on PDSOI CMOS, with SiGe HBT NPNs having ${f_{T}f_{\max}\,=\,375/510GHz}$ is presented. The bipolars are integrated on a PDSOI wafer in an epitaxial region above the handle wafer to avoid self-heating concerns. To our knowledge, this is the first time a high performance SiGe BiCMOS process has been demonstrated on a PDSOI wafer. In addition to the HBTs, the technology features high performance NFETs with ${f_{T}f_{MAX}\,=\,265/330GHz}$ and PFETs with ${f_{T}f_{MAX}\,=\,250/340GHz}$ enabling flexibility in circuit design. A full-flow demonstration PDK, digital standard cell and IO cell libraries have been released for experimental circuit design work. This work, funded under the DARPA T-MUSIC program, will address future extensions to higher HBT performance and more-advanced CMOS nodes.