A novel 5.46 mW H.264/AVC video stream parser IC
- Resource Type
- Conference
- Authors
- Brown, Michelle; Hsu, Kenneth W.
- Source
- 2008 IEEE International SOC Conference SOC Conference, 2008 IEEE International. :197-200 Sep, 2008
- Subject
- Components, Circuits, Devices and Systems
Components, Circuits, Devices and Systems
- Language
- ISSN
- 2164-1676
2164-1706
This paper presents a 5.46 mW H.264/AVC Video Stream Parser implemented in 65nm. The differences between targeting a video stream parser architecture for a 65nm CMOS ASIC and a Virtex 5 FPGA are also compared. Overall, the ASIC implementations showed higher performance and lower area than an FPGA, with a 60% increase in performance and 6x decrease in area.