Timing verification with the non-periodic gated clocking
- Resource Type
- Conference
- Authors
- Hanbin Kim; Eui-Young Chung; Kyu-Myung Choi; Jeong-Taek Kong; Sang-Hoon Lee
- Source
- 1996 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and systems Circuits and Systems (ISCAS), 1996 IEEE International Symposium on. 4:528-531 vol.4 1996
- Subject
- Components, Circuits, Devices and Systems
Communication, Networking and Broadcast Technologies
Engineered Materials, Dielectrics and Plasmas
Timing
Clocks
Delay estimation
Algorithm design and analysis
Computer aided engineering
Digital circuits
Geometry
Automatic logic units
Logic design
Circuit synthesis
- Language
Digital circuits can be implemented based on highly complex non-periodic clocking schemes. However, the conventional timing verifiers do not guarantee the correctness of timing analysis because they cannot consider full timing behaviors of a gated clock. This paper describes a novel hybrid timing verification approach which handles circuits using non-periodic gated clocking schemes. For its non-periodic nature of the gated clock, timing constraints must be generated considering full behaviors of the gated clock. Experimental results show that the proposed technique performs more complete and more reliable timing verification than conventional timing verifiers.