Graphs are a popular and effective way to represent relationships between data points in a network due to their simple data abstraction and low storage cost per data point. However, as data continues to grow, the processing complexity of graph operations also significantly increases. Thus, there is a need to accelerate graph processing through specialized techniques and hardware in order to improve analytical throughput. This research uses the oneAPI toolkit with SYCL for FPGAs and leverages the increased productivity when creating designs, as compared to traditional hardware description language methodologies. The oneAPI toolkit is used in the creation of minimum-spanning-tree (MST) and breadth-first search (BFS) accelerators, evaluating the impact of different high-level design choices on the overall performance observed.