Dependence of CMOS performance on silicon crystal orientation of [100], [111], and [110] has been investigated with the equivalent gate dielectric thickness less than 3 nm. Hole mobility enhancement of /spl ges/160% has been observed for both oxynitride and HfO 2 gate dielectrics on [110] surfaces compared with [100]. CMOS drive current is nearly symmetric on [110] orientation without any degradation of subthreshold slope. For HfO 2 gate dielectrics, an approximately 68% enhancement of pMOSFET drive current has been demonstrated on [110] substrates at L/sub poly/=0.12 μm, while current reduction in nMOS is around 26%.