Recently, as process refinement continues, the latest 3nm Gate-All-Around (GAA) process utilizing the Multi-Bridge-Channel-FET (MBCFET) with nanosheet technology enhances performance, power efficiency, and area (PPA) benefits by large effective channel width and enhanced design flexibility compared to the previous FinFET technology [1]. However, the 3nm GAA process provides only thin-gate oxide transistors for a 0.7V low supply voltage and does not offer thick-gate oxide transistors for higher supply voltages. Typically, a general-purpose analog-to-digital converter (ADC) needs to sample inputs at higher levels, such as 1.2V, over the 0.7V low supply voltage (VDD) in the 3nm GAA process. However, a conventional bootstrapped sampler can sample inputs only up to VDD level, using 2×VDD internal node voltages. In the previous FinFET processes with thick-gate oxide transistors for a 1.2V supply voltage, conventional bootstrapped samplers are useful enough to sample 1.2V input without any reliability and leakage issues. However, since the 3nm GAA process provides only thin-gate oxide transistors for the 0.7V low supply voltage, this paper introduces an innovative tolerant bootstrapped sampler architecture capable of sampling input levels up to 1.2V (1.7×VDD) with maximum internal node voltages of 1.9V (2.7×VDD) without reliability and leakage issues. Moreover, this paper also proposes a 0.7V 12-bit SAR ADC in a 3nm GAA process, using this new tolerant bootstrapped sampler.