New two-terminal transistor test structures and test methodology for assessment of latent charging damage
- Resource Type
- Conference
- Authors
- Brozek, T.
- Source
- 2000 5th International Symposium on Plasma Process-Induced Damage (IEEE Cat. No.00TH8479) Plasma process-induced damage Plasma Process-Induced Damage, 2000 5th International Symposium on. :149-152 2000
- Subject
- Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Components, Circuits, Devices and Systems
Power, Energy and Industry Applications
Nuclear Engineering
System testing
Stress
Monitoring
Degradation
Hot carriers
MOS devices
Transistors
Dielectric breakdown
Protective relaying
Tunneling
- Language
Design of test structures and fast test techniques for process-induced charging remains amongst the major problems of damage monitoring. This paper describes a new transistor configuration for antenna-type test structures and provides test methodology for assessment of latent charging damage. An example of application in metal antenna modules is demonstrated with respect to 50 /spl Aring/ gate oxide technology.