Design of 10-nm-scale recessed asymmetric Schottky barrier MOSFETs
- Resource Type
- Periodical
- Authors
- Yaohui Zhang; Jun Wan; Wang, K.L.; Bich-Yen Nguyen
- Source
- IEEE Electron Device Letters IEEE Electron Device Lett. Electron Device Letters, IEEE. 23(7):419-421 Jul, 2002
- Subject
- Engineered Materials, Dielectrics and Plasmas
Components, Circuits, Devices and Systems
Schottky barriers
Silicides
Tunneling
Silicon
Leakage current
Dielectric substrates
Voltage
Doping
MOSFET circuits
Logic
- Language
- ISSN
- 0741-3106
1558-0563
We have proposed and simulated a new 10-nm and sub-10 nm n-MOSFET that has a recessed channel and asymmetric source/drain Schottky Contacts (RASC MOSFETs). The recessed channel can effectively suppress short-channel effects, and the asymmetric source/drain contacts in which a higher Schottky barrier at the source contact can yield smaller off-state current while a lower Schottky barrier at the drain can yield larger on-state current. The simulated results show that the device can exhibit an on/off ratio as high as 10 6 and an on-state current of 393 μA/μm with a supply voltage of 1.0 V. Furthermore, the parameters of RASC MOSFETs are rather insensitive to size variations. These characteristics make the 10-nm or even sub-10 nm transistors potentially suitable for logic and memory applications.