High-level synthesis (HLS) technologies, which facilitate the synthesis of HDL from software language descriptions, have become integral in FPGA (Field Programmable Gate Array) development. Despite these advancements, crafting high-performance digital circuits and integrating circuit modules continues to demand expertise in both software and circuit design techniques. This complexity restricts the efficient reuse of FPGA circuit components, a crucial step towards streamlined development processes. To address this, we introduce a novel approach grounded in the principles of model-driven development (MDD) that leverages component-oriented design methods to enhance the reusability of FPGA circuit components. Central to our method is the utilization of a publish/subscribe model orchestrated through the Data Distribution Service (DDS). This paper delineates our pioneering component-oriented design method and introduces a supportive tool developed to operationalize this method, thus facilitating more efficient FPGA development cycles. Through a detailed case study, we illustrate the effective application of our tool in real-world settings, thereby highlighting its potential to significantly streamline FPGA development processes and encourage the reuse of circuit components.