We have studied the impact of various H 2 bakes (in-between 750 and 850 °C, this for durations in-between 15 and 120 s) on the structural properties of 16 nm thick sSi layers grown on top of polished Si 0.7 Ge 0.3 and Si 0.6 Ge 0.4 virtual substrates (VSs) after an “HF-last” wet cleaning. Those stacks have been characterized afterwards thanks to tapping mode—atomic force microscopy (AFM), surface light scattering (haze measurements), secondary ions mass spectrometry and Secco defect revelation. A definite oxygen contamination peak at the sSi/SiGe interface was associated to 750 °C, 120 s H 2 bakes. The resulting sSi layers were heavily defected and rough. By contrast, temperatures superior or equal to 800 °C yielded contamination-free interfaces. No clear impact of the H 2 bake temperature (⩾800 °C) and/or duration on the threading dislocation density and the “line” defect linear density was evidenced. Higher temperatures and longer bakes yielded rougher surfaces, however. The best compromise seemed to be {850 °C, 15 s} H 2 bakes. For such bakes, the surface root mean square surface roughness was in-between 0.1 and 0.2 nm only (10 μm×10 μm AFM images).