Power Constrained High-Level Synthesis of Battery Powered Digital Systems
- Resource Type
- Authors
- Sune Fallgaard Nielsen; Jan Madsen
- Source
- Nielsen, S F & Madsen, J 2003, Power Constrained High-Level Synthesis of Battery Powered Digital Systems . in DATE 2003 . IEEE, pp. 1136-1137, 2003 Design, Automation and Test in Europe Conference and Exposition, Munich, Germany, 03/03/2003 .
Technical University of Denmark Orbit
- Subject
- Language
- English
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle constraints. Our approach eliminates the large power spikes, resulting in an increased battery lifetime, a property of utmost importance for battery powered embedded systems. Our approach extends the partial-clique partitioning algorithm by introducing power awareness through a heuristic algorithm which bounds the design space to those of power feasible schedules. We have applied our algorithm on a set of dataflow graphs and investigated the impact on circuit area when applying different power constraints.