Performance of current-in-plane pseudo-spin-valve devices on CMOS silicon-on-insulator underlayers.
- Resource Type
- Article
- Authors
- Katti, R. R.; Zou, D.; Reed, D.; Schipper, D.; Hynes, O.; Shaw, G.; Kaakani, H.
- Source
- Journal of Applied Physics. 5/15/2003, Vol. 93 Issue 10, p7298. 3p. 2 Black and White Photographs, 1 Diagram, 4 Graphs.
- Subject
- *COMPLEMENTARY metal oxide semiconductors
*SILICON
*SEMICONDUCTORS
*MAGNETORESISTANCE
- Language
- ISSN
- 0021-8979
Prior work has shown that current-in-plane (CIP) giant magnetoresistive (GMR) pseudo-spin-valve (PSV) devices grown on bulk Si wafers and bulk complementary metal-oxide semiconductor (CMOS) underlayers exhibit write and read characteristics that are suitable for application as nonvolatile memory devices. In this work, CIP GMR PSV devices fabricated on silicon-on-insulator CMOS underlayers are shown to support write and read performance. Reading and writing fields for selected devices are shown to be approximately 25%-50% that of unselected devices, which provides a margin for reading and writing specific bits in a memory without overwriting bits and without disturbing other bits. The switching characteristics of experimental devices were compared to and found to be similar with Landau--Lifschitz--Gilbert micromagnetic modeling results, which allowed inferring regions of reversible and irreversible rotations in magnetic reversal processes. [ABSTRACT FROM AUTHOR]