Broadband electrical response analysis and charge transport theory through double Schottky barriers in ceramic semiconductors, are both used in order to separately study the grain boundary, depletion layer, and bulk grain regions of ZnO-based varistor samples sintered at 1180 °C for 0 h (no significant time at the sintering temperature), 2, 4, and 8 h. It is found that increased sintering times: (1) do not sensitively affect the bulk grain region; (2) broaden and flatten the space-charge-related dielectric loss term; and (3) make disappear a particular interface trap, deep below the equilibrium Fermi level, hence modifying the grain boundary density of states. [Copyright &y& Elsevier]