Silicon selective epitaxial growth (Si-SEG) plays an important role in 3D NAND memory because it switches on/off current in vertical channels (VC). In this study, a damaged layer containing carbon (C), fluorine (F), oxygen (O) impurities was detected after VC etch. It severely impacts the Si-SEG quality and results in large Si-SEG height variations. Novel ex situ or in situ halogen-containing plasma etch treatments (PETs) were developed in order to remove the damaged layer and impurities. A series of design of experiments (DOE) were also studied in order to optimize the PET recipe and minimize plasma damage by PET on the Si surface. Finally, optimized PET was shown to improve the crystallinity and height uniformity of Si-SEG.