Reduction of wafer arcing during high aspect ratio etching
- Resource Type
- Conference
- Source
- 2017 28th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) Advanced Semiconductor Manufacturing Conference (ASMC), 2017 28th Annual SEMI. :421-425 May, 2017
- Subject
Components, Circuits, Devices and Systems Engineered Materials, Dielectrics and Plasmas Engineering Profession Etching Plasmas Three-dimensional displays Grounding Optimization Layout Arcing issue high aspect ratio trench etch 3D NAND - Language
- ISSN
- 2376-6697