Effective Register Allocation for Configurable VLIW Crypto-Processor
- Resource Type
- Conference
- Authors
- Wu, Aiqing; Bie, Mengni; Nan, Longmei; Li, Wei
- Source
- 2021 IEEE 14th International Conference on ASIC (ASICON) ASIC (ASICON), 2021 IEEE 14th International Conference on. :1-4 Oct, 2021
- Subject
- Components, Circuits, Devices and Systems
Codes
Conferences
Hardware
Registers
Resource management
Cryptography
VLIW
- Language
- ISSN
- 2162-755X
An Effective register allocation algorithm for configurable VLIW crypto-processor is proposed in this paper. Calculate the intersection of definition-use chain constraint sets, and allocate register class. In the register bank allocation, prioritize instruction bundles with all slots filled and balance pressure between different banks. Specific register allocation adopts a global linear scan algorithm to improve efficiency. Experimental results show that this proposed algorithm can generate relatively high-quality code. The average utilization of registers under typical cryptographic algorithms is only 16.2%, and the maximum utilization is only 33.3%. This is instructive for the hardware design of crypto-processor architecture.