Design of A High Input Impedance OPA with Bi-JFET Technology
- Resource Type
- Conference
- Authors
- He, Zhengrong; Wang, Chenghe; Fan, Guoliang; Zhou, Yuanjie; Yang, Yang
- Source
- 2019 IEEE 2nd International Conference on Electronics Technology (ICET) Electronics Technology (ICET), 2019 IEEE 2nd International Conference on. :233-236 May, 2019
- Subject
- Engineering Profession
JFETs
Impedance
Semiconductor device measurement
Gain
Layout
Simulation
high input impedance
bi-JFET
OPA
detecting and amplifying
weak signals
- Language
A high input impedance operational amplifier (OPA) with bipolar junction field effect transistor (Bi-JFET) technology is presented. By using JFET differential pair, it achieves very low input bias offset current (pA magnitude) and low noise (3 nV/sqrt(Hz)). Moreover, bipolar gain stage and output stage provides high open-loop gain (120 dB), high output voltage slew rate (more than 10 V/μs) and broadband performance (more than 10 MHz). The proposed OPA is very suitable for detecting and amplifying all kinds of weak signals.