Insights to the Scaling Impact on Back-Gate Biasing for FD SOI MOSFETs
- Resource Type
- Conference
- Authors
- Chang, Ming-Yu; Wang, Li-Jing; Chiang, Meng-Hsueh
- Source
- 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2018 IEEE. :1-2 Oct, 2018
- Subject
- Components, Circuits, Devices and Systems
Electron devices
Silicon-on-insulator
Meetings
Substrates
Microelectronics
Manuals
FD SOI
ultra-thin boby and box (UTBB)
back bias
- Language
This work investigates the scaling impact on the feasibility of back-gate biasing for ultra-thin-body and BOX fully depleted SOI MOSFETs (UTBB FD SOI) at 5nm technology node. Though the effectiveness of the threshold voltage (V t ) modulation by back bias is limited due to bulk inversion as a result of silicon film scaling, such an issue of reduced V t window can be relieved by decreasing BOX thickness as the back-gate coupling could be enhanced by thin-BOX-reduced inversion charge centroid in scaled SOI film.