Scalable Modeling and Measurement of TSV Applied for Efficiency Improvement of a RF PA
- Resource Type
- Conference
- Authors
- Jhong, Ming-Fong; Ho, Cheng-Yu; Pan, Po-Chih; Cheng, Hung-Hsiang; Hsieh, Sheng-Chi; Wang, Chen-Chao; Hwang, Lih-Tyng
- Source
- 2016 IEEE 66th Electronic Components and Technology Conference (ECTC) Electronic Components and Technology Conference (ECTC), 2016 IEEE 66th. :1477-1482 May, 2016
- Subject
- Components, Circuits, Devices and Systems
Through-silicon vias
Inductance
Silicon
Integrated circuit modeling
Resistance
Substrates
Power amplifiers
Through Silicon Via(TSV)
Power Amplifier(PA)
- Language
A high efficient CMOS class-E power amplifier (PA) by using Quad Flat No-leads (QFN) package combined with Through Silicon Via (TSV) grounding is presented. TSV has much smaller parasitic inductance and resistance than wire-bonds. TSV technology can improve PA efficiency, reduce die size samples and retain low cost in QFN package. The TSV samples are made and measured by using double-side probing technique with a novel calibration method. TSV scalable model is established with good correlation comparing to RF measurement results. Apply the TSV scalable model in the CMOS PA simulation circuit. The simulation results show that TSV delivers obvious reduction in inductance compared to traditional wire-bond and improvement for Power Added Efficiency (PAE).