A 61MHz 72K Gates 1280×720 30FPS H.264 Intra Encoder
- Resource Type
- Conference
- Authors
- Li, De-Wei; Ku, Chun-Wei; Cheng, Chao-Chung; Lin, Yu-Kun; Chang, Tian-Sheuan
- Source
- 2007 IEEE International Conference on Acoustics, Speech and Signal Processing - ICASSP '07 Acoustics, Speech and Signal Processing, 2007. ICASSP 2007. IEEE International Conference on. 2:II-801-II-804 Apr, 2007
- Subject
- Signal Processing and Analysis
Components, Circuits, Devices and Systems
Quantization
Costs
Frequency
Encoding
IEC standards
ISO standards
Video compression
Energy consumption
Prediction algorithms
Parallel architectures
Intra prediction
H.264
- Language
- ISSN
- 1520-6149
2379-190X
This paper presents an HD720p 30 frames per sec H.264 intra encoder operated at 61MHz with just 72K gate count. We achieve the low cost and low operating frequency with the highly utilized variable pixel scheduling, and a modified three-step fast algorithm. Thus, the resulted design only needs half of operating frequency and reduces 30% of area cost compared to the previous HD720p intra encoder design.