Enhancing RISC-V Vector Extension for Efficient Application of Post-Quantum Cryptography
- Resource Type
- Conference
- Authors
- Zhao, Yifan; Kuang, Honglin; Sun, Yi; Yang, Zhen; Chen, Chen; Meng, Jianyi; Han, Jun
- Source
- 2023 IEEE 34th International Conference on Application-specific Systems, Architectures and Processors (ASAP) ASAP Application-specific Systems, Architectures and Processors (ASAP), 2023 IEEE 34th International Conference on. :10-17 Jul, 2023
- Subject
- Components, Circuits, Devices and Systems
Computing and Processing
Signal Processing and Analysis
Program processors
Systems architecture
Cryptography
Arithmetic
Post-quantum cryptography
RISC-V
Vector Architecture
ISA Extension
- Language
- ISSN
- 2160-052X
We present a cryptography extension built on RISC-V Vector Extension for efficient application of lattice-based post-quantum cryptography, offering custom instructions that can perform vectorized operations on polynomials of variable length and data width. We use micro-operation architecture to simplify the execution of variable-latency vector instructions and propose fracturable modular arithmetic units to support operations on variable coefficient width. On this basis, a vector unit is designed, achieving significant speed-up compared to the state-of-the-art counterparts for number-theoretic-transform-based polynomial multiplication. This cryptography extension is further integrated into the gem5 simulator to evaluate CRYSTALS-Kyber and CRYSTALS-Dilithium; results outperform the state-of-the-art implementations with more than 2.3 × improvement in cycle count.