A 27–29.5GHz 6-Bit Phase Shifter with 0.67 −1.5 degrees RMS Phase Error in 65nm CMOS
- Resource Type
- Conference
- Authors
- Duan, Qin; Chen, Zhi-Jian; Mao, Fengyuan; Zou, Yu; Li, Bin; Feng, Guangyin; Wang, Yanjie; Lin, Xiao-Ling
- Source
- 2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) Circuits and Systems (APCCAS), 2022 IEEE Asia Pacific Conference on. :574-577 Nov, 2022
- Subject
- Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
General Topics for Engineers
Circuits and systems
Simulation
Phase shifters
Asia
Switches
Bandwidth
CMOS process
phase shifter
CMOS
bandwidth
RMS phase error
RMS gain error
- Language
A 27-29.5GHz 6-bit switch-type phase shifter (PS) using 65nm CMOS process is presented in this paper. The PS incorporates 6 series phase shift bits to realize the relative phase shift varying from 0° to 354.375° with a step of 5.625°. Novel design approaches for phase shift bit and bits cascading sequence are proposed to improve the bandwidth and the RMS phase error. The post-layout simulation results show that the PS exhibits an ultra-low RMS phase error of 0.67°-1.5° and RMS gain error of 0.63dB-0.8dB from 27GHz to 29.5GHz. The input and output return loss are both better than −10dB and the core size iS $0.90\times 0.35\text{mm}^{2}$.