Configurable Cubical Redundancy Schemes for Channel-Based 3-D DRAM Yield Improvement
- Resource Type
- Authors
- Ching-Nen Peng; Bing-Yang Lin; Wan-Ting Chiang; Cheng-Wen Wu; Min-Jer Wang; Mincent Lee; Hung-Chih Lin
- Source
- IEEE Design & Test. 33:30-39
- Subject
- Engineering
Hardware_MEMORYSTRUCTURES
business.industry
Registered memory
02 engineering and technology
Parallel computing
020202 computer hardware & architecture
Built-in self-test
Hardware and Architecture
0202 electrical engineering, electronic engineering, information engineering
Redundancy (engineering)
Interleaved memory
Overhead (computing)
Memory rank
Electrical and Electronic Engineering
business
Software
Dram
Communication channel
- Language
- ISSN
- 2168-2364
2168-2356
Three-dimensional stacked memory stacking logic and memory dies are one of the most promising 3-D integration applications. This paper proposes two memory redundancy schemes to improve the yield of channelbased 3-D stacked DRAM by sharing spare memory across dies and satisfying channel constraints at the same time. The proposed schemes achieve much higher yield with very small area overhead than other memory redundancy schemes.