Highly-Doped Region Optimization for Reduced Hot-Carrier Effects in Dual-Gate Low Temperature Polysilicon TFTs.
- Resource Type
- Article
- Source
- IEEE Electron Device Letters; Dec2021, Vol. 42 Issue 12, p1794-1797, 4p
- Subject
IMPACT ionization HOT carriers STRAY currents LOW temperatures THIN film transistors THRESHOLD voltage - Language
- ISSN
- 07413106