In modern wireless communication systems, the required data rate has been increased significantly and continuously. For the system, A communication signal has been modulated more complexly and it has a higher peak-to-average power ratio (PAPR) and a wider signal bandwidth. Since a power amplifier (PA) in the transmitter of base stations must amplifies the modulated signal linearly, it operates mainly at an average output power region which is backed off too much from the peak output power with very low efficiency. Therefore, a PA which has high efficiency at the largely backed-off power region is required. For the reason, A Doherty power amplifier (DPA) that can efficiently amplify the modulated signals using load modulation method have been widely employed. Besides, massive multi-input and multi-output (MIMO) technology has been adopted to increase the coverage and capacity of the base stations. Since a large transceiver array is used for the MIMO systems, a compact 2-stage DPA have been required for simple structure of the system with high power gain.This dissertation discusses about design techniques for performance enhancement of DPA in terms of high-efficiency range extension. A new and intuitive design technique using the Smith chart is proposed for developing the load network of DPA using a complex combining load (CCL). The peaking amplifier consists of a larger cell size compared to that of the carrier amplifier in order to achieve higher power gain and peak output power in comparison with the conventional CCL-DPAs based on symmetric cells. For verification purposes, the proposed asymmetric CCL-DPA was designed and implemented using 6 W and 10 W GaN-HEMTs for the carrier and peaking amplifiers, respectively. For the 1.68 GHz continuous wave signal, the asymmetric CCL-DPA exhibited a power-added efficiency (PAE) of 68.0%, and a drain efficiency (DE) of 73.9% at a peak output power of 43.5 dBm. When an output power back-off of 9.5 dB was used, a PAE of 52.0% and a DE of 54.7% were achieved. Using the long-term evolution signal with a peak-to-average power ratio of 9.6 dB and a signal bandwidth of 10 MHz, a PAE of 53.6%, a DE of 56.4%, and a power gain of 13.5 dB were obtained at a power level of 34.0 dBm. Using a digital predistortion (DPD) technique, an adjacent channel leakage power ratio (ACLR) of -48 dBc was achieved at the same power level.This dissertation also discusses about a broadband 2-stage DPA. It presents a technique to design a broadband interstage network for a 2-stage DPA with dual drive amplifiers. The broadband interstage network consists of a load matching network of the drive stage, an input matching network of the main stage, and an optimized length of the transmission line between them. Both matching networks are designed with simple L-section structure for the reference impedance 50 Ω. Then, the 50 Ω transmission line with an optimized length between them matches the frequency deviations of the two matching networks over a broad frequency band. For verification of the broadband interstage network, a 3.4-3.8 GHz 2-stage DPA was designed and implemented as a hybrid circuit for the sub-6 GHz 5G NR band. The core size of the DPA is 25 mm × 40 mm, and a drain efficiency of 40.7- 47.0%, power gain of 27.5-27.7 dB, and ACLR of -46.4--40.4 dBc after DPD were obtained at an average output power of 37.5 dBm using the 5G NR signal with a signal bandwidth of 100 MHz and a PAPR of 9.3 dB.