Wafer-level chip-scale package (WLCSP) has attract broad interest from fundamental sciences to industrial applications due to its advantages in ease of fabrication, low cost and real die size packaging, etc. However, in the advanced WLCSP process, the stress between the package and the die is the key challenge, especially in the reliability tests such as thermal shocking, the stress can lead to defects such as cracking. In this paper, several parameters including top metal (TM) and polyimide (PI) are studied both through simulations and board-level reliability testing. The result revealed that, by reducing local metal density gradient and increasing PI thickness, stress relief region can be constructed to extend the fatigue life of WLCSP. An enhancement of more than 2× in thermal shocking reliability was achieved. This work provides a design guideline for structure optimization to satisfactory WLCSP reliability.