Thermal Microscopy has existed for more than a decade. It is well-established for the failure analysis on package-level which is usually performed on a bench station and few pins probing is sufficient. However, because of its inferior optical spatial resolution as compared to other laser and photon-based techniques, it is not commonly used in integrated circuits fault isolation, not to mention, dynamic fault isolation. In this paper, we demonstrate the advantages of tester-based thermal microscopy in offering a better diagnostic accuracy and the detection of missed defects using custom methods on memory built-in self-test failures. This setup is especially useful to improve the overall success rate for baseline yield improvement.