A Built-in self-calibration scheme for pipelined ADCs
- Resource Type
- Conference
- Authors
- Chang, Hsiu-Ming; Lin, Kuan-Yu; Chen, Chin-Hsuan; Cheng, Kwang-Ting
- Source
- 2009 10th International Symposium on Quality Electronic Design Quality of Electronic Design, 2009. ISQED 2009. Quality Electronic Design. :266-271 Mar, 2009
- Subject
- Components, Circuits, Devices and Systems
Calibration
Built-in self-test
Circuit testing
Analog circuits
Automatic testing
System-on-a-chip
Steady-state
Linearity
Capacitors
Operational amplifiers
Mixed-signal testing
built-in-self-test (BIST)
digitally-assisted analog testing
ENOB testing
digital calibration
- Language
- ISSN
- 1948-3287
1948-3295
There is a strong demand for both calibrating and testing the ADC performance before and after packaging for mixed-signal SoCs and SiPs. In this paper, we propose a built-in self-calibration scheme that offers digitally-controlled calibration of a pipelined ADC without using external stimulus. We further propose a self-testing strategy that uses the effective number of bits (ENOB) derived directly from the steady-state error of the self-calibration process for go/no-go testing as well as for performance binning. This testing process will not incur any additional test time beyond that required for calibration.