Bistatic PFA Parallel Algorithm Based on Double Chirp-Z Transforms and The Dsp Implementation
- Resource Type
- Conference
- Authors
- Liu, Jiayue; Liu, Qian; Song, Yue; Wu, Wanmin; Mao, Xinyu; Li, Zhongyu; Wu, Junjie; Yang, Haiguang
- Source
- IGARSS 2023 - 2023 IEEE International Geoscience and Remote Sensing Symposium Geoscience and Remote Sensing Symposium, IGARSS 2023 - 2023 IEEE International. :8118-8121 Jul, 2023
- Subject
- Aerospace
Components, Circuits, Devices and Systems
Fields, Waves and Electromagnetics
Geoscience
Signal Processing and Analysis
Semiconductor device measurement
Chirp
Azimuth
Digital signal processors
Signal processing algorithms
Imaging
Transforms
Bistatic SAR
DSP
PFA
CZT
- Language
- ISSN
- 2153-7003
Multi-core digital signal processor (DSP) is widely used in SAR real-time imaging system for its high-speed operation capacity and parallel working ability. The matching of the algorithm and the parallel architecture has great impact on imaging speed of SAR processing. This paper proposed an efficient imaging architecture based on multi-core DSP TMS320C6678. The system implements bistatic polar format algorithm (PFA), using two-dimensional Chirp-Z Transform and one-dimensional interpolation to realize two-dimensional resampling. The experimental results show that the proposed architecture can complete 1024×1024 points echo processing and output a 1024×1024 pixels image within 1.7 seconds.