ESD-capability Enhancement of Ultra-high Voltage nLDMOSs by the DPW Discrete Layer
- Resource Type
- Conference
- Authors
- Zhou, Yu-jie; Chen, Shen Li; Wu, Pei-Lin; Lin, Po-Lin; Fan, Sheng-Kai; Lan, Tien-Yu; Hong, Shi-Zhe
- Source
- 2020 3rd IEEE International Conference on Knowledge Innovation and Invention (ICKII) Knowledge Innovation and Invention (ICKII), 2020 3rd IEEE International Conference on. :59-60 Aug, 2020
- Subject
- Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
General Topics for Engineers
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Modulation
Electrostatic discharges
Logic gates
Electric breakdown
MOSFET
High-k dielectric materials
Technological innovation
Deep p-type well (DPW)
Electrostatic discharge (ESD)
Lateral diffused MOS(LDMOS)
Secondary breakdown current (It2)
Ultra-high voltage (UHV)
- Language
The RESURF-region effect formed by the DPW layer and HVNW in an ultra-high voltage (UHV) LDMOS device on the electric field distribution and its ESD capability is investigated in this paper. After testing these DPW-layer partition samples of the UHV nLDMOS by a TLP tester, it can be found that the secondary breakdown current (It2) of the DPW1/4 & DPW_24 cells were increased from 1.73A to 3.36A (increasing 94.2%) as compared with the Reference device. Therefore, the discrete DPW layer can greatly improve the ESD capability in the UHV nLDMOS components.