A 0.1-3 GHz 0.5W two-stage quadruple-stacked CMOS Power PA
- Resource Type
- Conference
- Authors
- Lin, Qian; Zhao, Peng-Fei; Jia, Li-Ning; Yang, Rui-Lan; Wu, Hai-Feng
- Source
- 2023 International Conference on Microwave and Millimeter Wave Technology (ICMMT) Microwave and Millimeter Wave Technology (ICMMT), 2023 International Conference on. :1-3 May, 2023
- Subject
- Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Signal Processing and Analysis
Resistors
Resistance
Radio frequency
Semiconductor device measurement
Power amplifiers
Gain measurement
CMOS technology
- Language
A 0.1-3 GHz broadband radio frequency (RF) power amplifier (PA) based on complementary metal oxide semiconductor (CMOS) technology is designed in this article. a two-stage quadruple-stacked structure with combinations of matching resistor and feedback resistor is employed to achieve a high power output. Measurement results show that this PA gain flatness of 30±1.2 dB, the maximum input return loss (S11) is less than -11 dB and the maximum output return loss (S22) is less than -11 dB. At 1.5 GHz, the saturated output power is up to 27 dBm, and power added efficiency (PAE) is 23%.