A 28.16-Gb/s Area-Efficient 60GHz CMOS Bi-Directional Transceiver for IEEE 802.11ay
- Resource Type
- Conference
- Authors
- Pang, Jian; Tokgoz, Korkut Kaan; Maki, Shotaro; Li, Zheng; Luo, Xueting; Abdo, Ibrahim; Kawai, Seitarou; Liu, Hanli; Liu, Bangan; Katsuragi, Makihiko; Kimura, Kento; Shirane, Atsushi; Okada, Kenichi
- Source
- 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC) Solid-State Circuits Conference (A-SSCC), 2018 IEEE Asian. :77-78 Nov, 2018
- Subject
- Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Fields, Waves and Electromagnetics
Robotics and Control Systems
Signal Processing and Analysis
Transceivers
Bidirectional control
Baseband
Noise measurement
Mixers
MIMO communication
Bandwidth
60 GHz
CMOS
transceiver
bi-directional
- Language
This paper introduces a 60-GHz CMOS transceiver designed for IEEE 802.11ad/ay featuring the area-efficient bi- directional operation. The proposed bi-directional PA-LNA occupies for less than half on-chip area while staying a similar performance with the conventional standalone PA and LNA. The measured noise figure in RX mode is 4.8dB at 62.56GHz, and the measured EVM is −26dB in TX mode with an output power of −4.2dBm. Thanks to the compact PA-LNA, this work realizes a maximum data-rate of 28.16Gb/s in 16QAM with only 3mm 2 . The power consumption is 105m W in TX mode and 128mW in RX mode.