A 23.9-μW 13.6-Bit Period Modulation-Based Capacitance-to-Digital Converter With Dynamic Current Mirror Front-End
- Resource Type
- Periodical
- Authors
- Lee, H.; Seo, D.; Woo, Y.; Lee, Y.; Lee, I.; Chae, Y.
- Source
- IEEE Solid-State Circuits Letters IEEE Solid-State Circuits Lett. Solid-State Circuits Letters, IEEE. 7:135-138 2024
- Subject
- Components, Circuits, Devices and Systems
Computing and Processing
Capacitance
Voltage
Voltage measurement
Transistors
Current mirrors
Transconductance
Thermal noise
Capacitance-to-digital converter (CDC)
dynamic current mirror (DCM)
high precision
low power
period modulation (PM)
- Language
- ISSN
- 2573-9603
This letter proposes a low-power high-precision capacitance-to-digital converter (CDC) utilizing a dynamic current mirror (DCM) to transform a sensor input capacitance $(C_{\mathrm{ IN}})$ into an output current. The resulting current is directly proportional to the ratio of $C_{\mathrm{ IN}}$ to an internal reference capacitor $(C_{\mathrm {REF}})$ and subsequently converted into a period-modulated output, facilitating simple digitization by a digital counter. The CDC achieves an extensive $C_{\mathrm{ IN}}$ range of 1 to 68 pF without the need for a power-hungry reference buffer. Fabricated in a 65-nm CMOS process, the prototype IC occupies a small area of 0.05-mm2 and consumes only $23.9~\mu \text{W}$ even with a $C_{\mathrm{ IN}}$ of 47 pF. It achieves a capacitance resolution of 1.65 fF for a $C_{\mathrm{ IN}}$ of 1 pF with a conversion time of 4 ms, corresponding to a 13.6-bit effective number of bit.