With the rapid reduction in the size of chips nowadays, the phenomenon of circuit aging is becoming more significant. The impact of circuit aging includes slower chip speed, irregular timing characteristics, and increased power consumption. Such impacts have a negative effect on the proper functioning of the chips. Instead of over-designing chips to ensure reliable operation for a long time, this research work proposes a system to monitor the aging process and determine the stage of aging the chip so that, the necessary corrective measures can be undertaken to avoid any functional failures that may occur over time.